ALLE KATEGORIENA VHDL Modeling Guide-Modeling with EIA-567
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Veröffentlichungszeit: 2018-12-10 Größe: 360 Kb Format: PDF Heruntergeladen: 27
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Einführung
In the 1991/2 time frame, Mr. Len Finegold, working on an Air Force contract for the Computer Science Corporation, developed an example DID compliant VHDL model of a Viterbi Decoder. Mr. Finegold based his work upon the EIA-567 Commercial Component Specification. However, the packages and modeling approach.he developed have yet to be formally adopted by the EIA.
The goal of EIA-567 modeling approach described herein, is to develop an Electronic Data Sheet for a component,sub-assembly, assembly or system using VHDL. Elements modeled in the EDS include input and output pin characteristics (including min/max operating currents, voltages, propagation delays and loads), timing constraints (such as setup and hold times and/or min/max pulse widths), and operating point conditions (such as voltage, power,temperature, package type, radiation hardness, etc.)