Today’s embedded system designers face an unprecedented challenge from an I/O perspective. As system complexity rises, they are increasingly asked to address a multitude of potential I/O options. These options can range from interfacing one industry bus to another, to connecting new and higher performance sensors with mature application processors. Moreover, this problem is pervasive across all markets from high volume consumer applications to the latest industrial, scientific and medical systems.

To be sure, few system architectures can deliver the tremendous flexibility needed to scale with today’s rapidly changing I/O requirements, particularly where low power and low cost are concerned. To address this need, designers are implementing a wide variety of interface bridging solutions that allow them to transfer data across protocols and, in the process, expand system functionality. The challenge is determining how to most efficiently implement these new bridging solutions without violating system power, footprint and cost requirements. This paper looks at potential solutions and examines how designers can tackle the interface challenge by implementing highly optimized bridging solutions in ultra-low density (ULD), low power field programmable gate arrays (FPGAs) that combine the flexibility of a programmable platform with high performance at low power.