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LCMXO3LF-4300C-5BG400C

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MachXO3LF Series 4320 LUTs 92KB 335 I/O 2.5/3.3V Commerical Slow PLD - BGA-400

Hersteller : Lattice Semiconductor Corp
Verpackung/Behälter : 400-LFBGA
Produkt der Kategorien : FPGAs
Datasheet: LCMXO3LF-4300C-5BG400C Datasheet (PDF)
RoHs Status: Lead free / RoHS Compliant
Lagerbestand: 500

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LCMXO3LF-4300C-5BG400C Beschreibung

MachXO3TM device family is an Ultra-Low Density family that supports the most advanced programmable bridging and IO expansion. It has the breakthrough IO density and the lowest cost per IO. The device IO features have the integrated support for latest industry standard IO. The MachXO3L/LF family of low power, instant-on, non-volatile PLDs has five devices with densities ranging from 640 to 6900 Look-Up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, Phase Locked Loops (PLLs), pre-engineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I2 C controller and timer/counter. MachXO3LF devices also support User Flash Memory (UFM). These features allow these devices to be used in low cost, high volume consumer and system applications.

Feature

1.1.1. Solutions 

 Smallest footprint, lowest power, high data throughput bridging solutions for mobile applications 

 Optimized footprint, logic density, IO count, IO performance devices for IO management and logic applications 

 High IO/logic, lowest cost/IO, high IO devices for IO expansion applications 

1.1.2. Flexible Architecture 

 Logic Density ranging from 64 to 9.4K LUT4 

 High IO to LUT ratio with up to 384 IO pins 

1.1.3. Advanced Packaging 

 0.4 mm pitch: 1K to 4K densities in very small footprint WLCSP (2.5 mm × 2.5 mm to 3.8 mm × 3.8 mm) with 28 to 63 IOs 

 0.5 mm pitch: 640 to 9.4K LUT densities in 6 mm x 6 mm to 10 mm x 10 mm BGA packages with up to 281 IOs 

 0.8 mm pitch: 1K to 9.4K densities with up to 384 IOs in BGA packages 

1.1.4. Pre-Engineered Source Synchronous I/O 

 DDR registers in I/O cells 

 Dedicated gearing logic 

 7:1 Gearing for Display I/Os 

 Generic DDR, DDRx2, DDRx4 

1.1.5. High Performance, Flexible I/O Buffer 

 Programmable sysIO™ buffer supports wide range of interfaces: 

 LVCMOS 3.3/2.5/1.8/1.5/1.2 

 LVTTL 

 LVDS, Bus-LVDS, MLVDS, LVPECL 

 MIPI D-PHY Emulated 

 Schmitt trigger inputs, up to 0.5 V hysteresis 

 Ideal for IO bridging applications 

 I/Os support hot socketing 

 On-chip differential termination 

 Programmable pull-up or pull-down mode

1.1.6. Flexible On-Chip Clocking 

 Eight primary clocks 

 Up to two edge clocks for high-speed I/O interfaces (top and bottom sides only) 

 Up to two analog PLLs per device with fractional-n frequency synthesis 

 Wide input frequency range (7 MHz to 400 MHz). 

1.1.7. Non-volatile, Multi-time Programmable 

 Instant-on 

 Powers up in microseconds 

 Optional dual boot with external SPI memory 

 Single-chip, secure solution 

 Programmable through JTAG, SPI or I2C 

 MachXO3L includes multi-time programmable NVCM 

 MachXO3LF reconfigurable Flash includes 100,000 write/erase cycle 

 Supports background programming of non-volatile memory 

1.1.8. TransFR Reconfiguration 

 In-field logic update while IO holds the system state 

1.1.9. Enhanced System Level Support 

 On-chip hardened functions: SPI, I2C, timer/counter 

 On-chip oscillator with 5.5% accuracy 

 Unique TraceID for system tracking 

 Single power supply with extended operating range 

 IEEE Standard 1149.1 boundary scan 

 IEEE 1532 compliant in-system programming

Anwendungen

 Consumer Electronics 

 Compute and Storage 

 Wireless Communications 

 Industrial Control Systems 

 Automotive System

LCMXO3LF-4300C-5BG400C Block Diagram
(Bild: Diagram)

Technische Parameter

  • Category
  • Integrated Circuits (ICs)
  • Delay Time tpd(1) Max
  • 6.96ns
  • Mounting Type
  • Surface Mount
  • Number of I/O
  • 335
  • Number of Logic Elements/Blocks
  • 540
  • Operating Temperature
  • 0掳C ~ 85掳C
  • Package / Case
  • 400-LFBGA
  • Packaging
  • Tray
  • Programmable Type
  • In System Programmable
  • Series
  • MachXO3
  • Standard Package
  • 90
  • Supplier Device Package
  • 400-CABGA (17x17)
  • Voltage Supply Internal
  • 2.375 V ~ 3.465 V

LCMXO3LF-4300C-5BG400C Datasheet

LCMXO3LF-4300C-5BG400C Verwandte besondere

Ratings and Reviews (1)

  • 5 / 5
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  • **bstr***
    2019-09-12

    Item arrived on time and as described - many thanks!

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Q: How does Jotrin guarantee that LCMXO3LF-4300C-5BG400C is the original manufacturer or agent of LATTICE?
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Lattice Semiconductor Corp

Lattice
Lattice Semiconductor Corporation is a leading provider of Programmable Logic Devices, software, Intellectual Property, and development kits. The Mid-Range Lattice ECP3 family is the lowest power SerDes enabled FPGA available in the market. The MachXO is the most versatile non-volatile PLD targeted...

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