AD9833 chip realizes programmable telemetry signal source

Introduction

The main function of the telemetry signal source is to simulate missile-borne telemetry information. From the technical realization, the signal source can be divided into analog signal source, digital signal source and DDS signal source. The DDS signal source is the development direction of modern signal sources. DDS technology (direct digital frequency synthesis) is a new frequency synthesis method developed rapidly in recent years. It has programmable and easy to implement various digital modulations (such as high-precision digital modulations such as PSK, FSK), and high frequency resolution. , Fast conversion speed, high stability, low phase noise and high integration. In recent years, with the development of telemetry technology, telemetry products have gradually presented applications such as miniaturization, standardization, and serialization. Therefore, in order to meet the application requirements, the telemetry signal source must be able to provide various types of signals to be tested, and adjust them in real time according to changes in the parameters of the module under test to achieve one-to-one correspondence. However, traditional telemetry signal sources lack flexibility and versatility in design, and the diversity and real-time performance of the measured parameters are poor, which cannot meet the development needs of telemetry products. In view of this, this paper proposes a programmable telemetry signal source with FPGA (field programmable gate array) and DDS special chip as the core.

1. FPGA and DDS basic working principle

Generally, traditional signal sources use the resonance method, that is, a frequency selective circuit is used to generate a sinusoidal oscillation to obtain the required frequency. Such a signal source has a single output waveform, and its frequency stability and accuracy are poor. Therefore, traditional signal sources are increasingly unable to meet the measurement needs of modern telemetry products. The telemetry signal source designed with DDS technology can meet the requirements of waveform diversification, flexible frequency and phase configuration, and high frequency stability.

1.1 FPGA

FPGA is a kind of high-density programmable logic device. After more than 20 years of development, the logic scale of FPGA has grown from the original 1000 available gates to the current 10 million available gates. Designed in Verilog HDL language, there are great advantages in writing incentives and modeling. The basic components of an FPGA include a programmable input / output unit, a basic programmable logic unit, an embedded block RAM, rich wiring resources, a low-level embedded functional unit, and an embedded dedicated hard core. FPGA devices are structured into arrays by logical function blocks. These function blocks are connected through programmable internal wiring to achieve certain logic functions. Due to the high integration of FPGA devices, short development and time to market, they have been rapidly popularized and applied in digital design and electronic production, and once dominated the field of high-density programmable logic devices.

Altera is one of the main suppliers of FPGA chips in the market. It provides users with a complete development system and good after-sales support services, and has a mature series of products. The company's programmable logic products can be divided into three categories: high-density FPGAs, low-cost FPGAs, and CPLDs. Compared with low-cost FPGAs, high-density FPGAs are mainly used in mid-to-high-end routers and switches. The prices are relatively high. Although CPLDs have lower prices, they have limited wiring resources and are not suitable for complex timing function designs. Cyclone (Hurricane) series is a low-cost FPGA launched by Altera Corporation, which is mainly positioned in a large number of cost-sensitive designs. Cyclone EP1C6 is a cost-effective FPGA from Altera. The operating voltage is 3.3 V and the core voltage is 1.5 V. Its density is 5980 logic cells, including 20 128 × 36 b RAM blocks (M4K modules). The total RAM The space reaches 92 160 b. It has two phase-locked loop circuits and a specific dual data rate interface for connecting SDRAM.

1.2 DDS and its chips

DDS uses an all-digital structure that is different from traditional frequency synthesis methods. It was originally proposed by American scholar J. Tierncy and others in the 1970s. It is the third-generation frequency synthesis technology that has developed rapidly with digital integrated circuits and microelectronic technologies after direct frequency synthesis and indirect frequency synthesis. . DDS refers to the direct synthesis of the required waveform from the concept of phase quantization, which effectively solves many problems that cannot be solved by analog synthesis technology.

At present AD company is the largest supplier of the mainstream DDS chip market, and the many DDS integrated chips it provides have achieved extremely wide applications with their high cost performance. AD company's DDS products mainly include AD983X, AD985X and AD995X three series. For the AD985X series, although its performance is better, the power consumption is higher, while the AD995X series has lower power consumption, but its price is higher than the AD983X series. In the AD983X series. The maximum power dissipated by the AD9833 is only 20 mW. At the same time, AD9833 also has the characteristics of simple peripheral circuits, programmable frequency and phase. The AD9833 performs write operations through a 3-wire SPI serial port. There are five programmable registers inside, including a 16-bit control register, two 28-bit frequency registers, and two 12-bit phase registers. The user can set the required functions through the 16-bit control register. The analog output of the AD9833 is fout:

fout = (fCLK / 228) × FREQREG (1)

FREQREG is the frequency word in the selected frequency register.

Signal phase shift is pout:

pout = (2π / 4 096) × PHASEREC (2)

Where PHASEREC is the phase word in the selected phase register.

Programmable telemetry signal source based on FPGA and DDS chip

The traditional telemetry signal source has poor programmability in design, which greatly affects its flexibility and versatility, and also causes a serious waste of resources. The design of this solution has strong programmability, can be flexibly configured, and has high versatility, which greatly saves resource costs.

The hardware circuit of this telemetry signal source is mainly composed of low-cost FPGA and DDS special-purpose chip, and the software is programmed in Verilog language. For the software part, the control interface and control word programming of this signal source is an important part of software programming. The FPGA control interface is programmed to implement the serial communication protocol. The preset control word must be serially output to the DDS chip according to the control interface communication protocol. The DDS chip can receive the control word information and output the required waveform according to the received control word information .

2.1 Hardware composition of telemetry signal source

The telemetry signal source mainly includes the following three components.

(1) Key circuit

It mainly sends control information to the FPGA. Part of the keys provide waveform selection information, and the other part provides the frequency information of the waveform to be output.

(2) System FPGA control core

FPGA is the core control part of the system. When the FPGA receives the key information, it sends the corresponding control information to the DDS chip. Through programming, FPGA chip EP1C6T144 can realize flexible configuration.

(3) DDS circuit

This part mainly uses AD9833 chip to build peripheral circuits. Generate the required waveform signal according to the received FPGA control information and output it.

In this system, the user can output waveforms such as sine wave, triangle wave, and square wave with the default frequency through the waveform selection button. If the waveform of different frequencies needs to be output during the use, it can be achieved by the frequency selection button. In the FPGA control module, when the FPGA receives data or status change information, the corresponding variable assignments will change accordingly, and then output the corresponding control word to the AD9833 chip. After AD9833 receives the control word, it directly passes Digital frequency synthesis to finally output the required waveform.

2.2 Control interface of telemetry signal source

The DDS chip AD9833 is a 3-wire SPI interface, which can be directly connected to some microprocessors, but for FPGAs, it must be implemented by programming the SPI protocol. Therefore, in the FPGA control, the SPI is modularly designed. Both the phase control word output and the frequency control word output need to pass the SPI module and then output according to the SPI protocol.

In the FPGA, the external key information is received first, and the key state or data module is triggered. According to the information provided by the module, the corresponding registers (preq0, fdreq0, fhreq0) are assigned in the phase and frequency control module and completed The configuration of the phase and frequency control words is input to the SPI module and the SPI protocol is used to output the SPI protocol to the AD9833. The control output must meet the timing control of the AD9833.

Under the control of the serial clock input SCLK (spiclk), SCLK is high, when the enable signal FSYNC (spics) is low, SDATA (spido) output) starts to input data, and the data is written to the AD9833 in the form of 16-bit words. FSYNC can be held low during multiple sets of 16 SCLK pulses, transmitting a continuous 16-bit word stream, and waiting for the 16th SCLK falling edge of the last word to become high after data transmission is complete.

2.3 Software control word of telemetry signal source

For a telemetry signal source that is flexible, configurable, and versatile, its real-time changes in parameters such as frequency and waveform are essential. To achieve real-time changes of these parameters, the system must change the control word accordingly. For example, the control word of a sine wave is hexadecimal number 0008, the control word of a triangle wave is hexadecimal number 000A, and the control word of a square wave is hexadecimal number 0028.

From the calculation formula of the analog output frequency of AD9833 (refer to formula (1)), we can know that if a 20 MHz crystal is used as the main frequency clock of the AD9833 to output a 10 kHz sine wave signal, the hex of the frequency word FREQREG can be calculated. The number is 20C49. If the frequency register 0 and phase register 0 of the AD9833 are selected during software design, after adding the register ID, the FPGA writes the high-order hexadecimal number of the frequency word of AD98 33 to 4008 and the low-order hexadecimal number to 4C49. Before writing data to the frequency register, if the hexadecimal number 2000 is written to the control register, the frequency register can be set to a complete 28 bits for use. If the hexadecimal number is written to 0000, the frequency register is used. Can be used as two 14-bit registers. The phase word can be calculated according to equation (2). When the phase offset is 0 °, the phase word PHASEREC is a hexadecimal number D000 (the phase register is labeled 1101); when the phase offset is 180 °, the phase word PHASEREC is a hexadecimal number D800.

3. Simulation verification

The simulation is under the QuartusⅡ environment, using its own simulation software to perform functional simulation of the entire project.

The simulation uses a 20 MHz crystal as the main frequency clock of the AD9833 to output sine, square, and triangle waves with a phase offset of zero and a frequency of 10 kHz, and a 5 kHz sine wave with a phase offset of 180 °.

Through the analog output frequency formula, when the frequency is 5 kHz, the hexadecimal number of the frequency word FREQREG is 10624. The high-order hexadecimal number of the frequency word written by the FPGA to AD9833 is 4004 and the low-order hexadecimal number is 4624.

Conclusion

This paper presents a telemetry signal source based on FPGA and DDS chips. This signal source is mainly composed of Cyclone EP1C6 and AD9833 chips to build the hardware circuit. The program is implemented in Verilog language. The FPGA is controlled to output data to the DDS chip, and finally the required waveform output is achieved. Simulations show that the telemetry signal source can flexibly and conveniently output sine, triangle, and square wave signals with a frequency range of 0 to 12.5 MHz and adjustable phases. The parameterization of this solution is not counted, which greatly facilitates the change of the required waveform data and enhances the flexibility of the signal source. Although this signal source can output sine wave, square wave, and triangle wave with flexible frequency and phase, it does not realize the output of arbitrary waveform. Therefore, the future research direction is to achieve the design of arbitrary waveforms to increase the flexibility and configurability of the signal source and further enhance its versatility.

Etikett: AD9833

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